Market demand for smaller and more functional electronic devices has driven the development of semiconductor devices, packages, and highly functional chips. Multiples of these functional chips are formed on a surface of a semiconductor wafer and include specific, desired chip properties. The semiconductor wafer includes a semiconductor substrate having a metal layer on one side and an active surface opposite the metal layer. The metal layer is configured to provide electrical connection for each chip after the chip is separated from the wafer. The active surface is fabricated to include contact pads that provide electrical access to the chip. After fabrication, the chips are cut or singulated from the semiconductor substrate and suited for individual use in electronic devices.
FIG. 1 is a cross-sectional view of a conventional semiconductor substrate 20. The known semiconductor substrate 20 includes a silicon portion 22 defining an active surface 24, a back side 26 opposite active surface 24, and a metal layer 28 deposited on back side 26. Semiconductor substrate 20 is fabricated to include a plurality of chips (not shown) deposed in the plane of active surface 24. After fabrication of semiconductor substrate 20, it is desired to separate, or singulate, the individual chips by sawing semiconductor substrate 20 from active surface 24 down to back side 26 and through metal layer 28.
It is known that sawing through metal layer 28 is likely to produce burrs 30, and/or cracks 32. Burrs 30 and cracks 32 are highly undesirable. Burrs 30 extend from metal layer 28 and deleteriously affect electrical performance/contact of the chip when coupled to another electronic device. Cracks 32 can potentially interrupt the electrical contact between the silicon layer 22 and metal layer 28. In addition, cracks 32 in silicon portion 22 are known to propagate when the chip is thermally cycled, thus possibly interrupting electrical connection for the chip.
Dicing or cutting semiconductor substrate 20 from metal layer 28 through silicon layer 22 is problematic because the chip pattern (or kerf) on active surface 24 is not visible from the metal layer 28 side. Thus, blindly sawing semiconductor substrate 20 from metal layer 28 toward active surface 24 has the potential of damaging the unseen chips on active surface 24.
For these and other reasons there is a need for the present invention.